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XJTAG is a leading supplier of IEEE Std. 1149.1 compliant boundary scan development tools. Its JTAG (Joint Test Action Group) development system offers a highly competitive solution for designers and developers of electronic circuits.


"The support provided to facilitate integration with LabVIEW makes XJTAG really stand out against other systems. The service from XJTAG is competitively priced and offers outstanding flexibility and competencies that support our test requirements. We are using XJTAG at every stage of our product lifecycle. Since introducing it, we have increased test coverage by at least 30% while halving test cycle time and saving 60% of test hardware costs. We are very pleased with the results.”

-Worldline, an Atos company-, Leon Alfano, Industrialization Test Specialist Worldline.



  • Advanced connection test
Tests a higher percentage of your circuit than most other JTAG solutions and provides high precision fault isolation.
  • Flexible, high-level, test description language
Designed to simplify the process of test creation.
  • Device-centric approach
Device tests can be reused in different circuits without modification.
  • Testing and programming non-JTAG devices
Non-JTAG devices connected to devices on the chain can be manipulated just as easily as those on the chain, for advanced testing - eg. ethernet loopback.
  • Free Test Library
A large number of standard parts available in the installed XJEase library
  • No need to understand how JTAG works
The XJTAG system works out how to drive the JTAG chains for you.
  • Program devices
SVF and STAPL files can be run from XJDeveloper to program devices, or XJEase scripts can be used to program an image directly.
  • Layout Viewer to show the physical location of circuit elements and faulty nets.
  • Schematic Viewer to show circuit functionality whilst developing or debugging tests
  • Integration with custom applications to create a full test system.
  • Supports 1149.1 and 1149.6 devices.

Key Benefits

  • Reduce your time spent debugging boards due to high precision fault isolation
  • Improve your time to market and reduce project risk by early design verification
  • Reduce your test development time by reusing tests from prototype/design in manufacturing and field support
  • Ongoing time savings by test reuse across projects

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