News > New Compilation Tools patch for RealView® Development Suite 3.1 available
New Compilation Tools patch for RealView® Development Suite 3.1 available
3/27/2009 - A new Compilation Tools patch (Build 794) for RealView Development Suite 3.1 is now available from the ARM website. This RVCT 3.1 patch #7 can be used to update any RVDS 3.1 Standard or Professional installation.
This RVCT 3.1 patch #7 is intended for use with RealView Development Suite (RVDS) 3.1 products. It can be used to update any RVDS 3.1 or RVDS 3.1 Professional installation, whether previously patched or an original installation. It is NOT compatible for use with the RVDS 3.1 Evaluation CD or previous (3.0 or earlier) releases of RVCT/RVDS or Keil MDK products.
This patch is able to workaround Cortex-A8 Erratum 657417, which affects 32-bit Thumb-2 branch instructions that span two 4K regions, where the target address is in the first 4K region. Full details of the workaround in the linker is given below.
This patch consists of updated RVCT/RVDS 3.1 compiler, linker, assembler, fromelf, and armar. Program executables; updated Include files (only arm_neon.h, ctype.h, dspfns.h, c55x.h have changed since the original RVCT 3.1 build 569 release) and updated C/C++ libraries.
The client licensing software for the RVCT executables is updated from FLEXnet 10.8.5.0 to FLEXnet 10.8.7.0.
OS Platforms Supported
This patch has been tested on the following platforms:
Windows 2000 SP4
Windows XP SP2, 32-bit & 64-bit
Windows XP SP3, 32-bit
Windows Vista Business Edition SP1, 32-bit & 64-bit
Windows Vista Enterprise Edition SP1, 32-bit & 64-bit
Windows Server 2003 32-bit & 64-bit
Red Hat Linux Enterprise 4 for x86, 32-bit & 64-bit
Red Hat Linux Enterprise 5 for x86, 32-bit & 64-bit
RVCT 3.1 build 794 includes the following corrections and improvements since RVCT 3.1 build 761:
Compiler:
- __declspec(dllimport) and __declspec(dllexport) now affect class members, for example:
class __declspec(dllimport) T {
void f(); // is now effectively __declspec(dllimport)
};
- Symbol table entries are now generated for an exported class
- More intrinsics have been added to the c55x.h header, including support for multiplies involving unsigned 16-bit operands, and non-fractional multiplies: _a_lsadd, _a_sadd, _a_smac, _a_smacr, _a_smas, _a_smasr, _lmpy, _lmpysu, _lmpyu, _lsat, _lsmpyi, _lsmpyr, _lsmpysu, _lsmpysui, _lsmpyu,
_lsmpyui, _smaci, _smacr, _smacsu, _smacsui, _smasi, _smasr, _smassu, _smassui
- When a non-RVCT library interface is specified, and math functions are defined, the '__hardfp_' prefix is no longer applied to the function names
- NEON VSHLL intrinsics now accept a shift amount equal to the datatype size
- The macro __FILE__ can now be redefined on the command line. In particular, it can be defined to be __MODULE__, which causes all uses of __FILE__ to use filenames without paths, by using "-D__FILE__=__MODULE__" on the compiler's command-line
- The compiler now supports the intrinsics __sev(), __wfe(), __wfi(), and __yield() when compiling for --cpu ARM1156T2-S. Note that this processor implements these instructions as NOPs
- Some code generation issues have been addressed
- Some causes of the following internal faults have been fixed: 0x2ecad9, 0x666b41, 0x87ecef, 0xca4d2f
C/C++ Libraries:
- atan2f() has been corrected to return NaN when its input parameters are +0/-0
- modf() has been corrected to return NaN when the first input parameter is NaN
Linker:
- armlink is able to workaround Cortex-A8 Erratum 657417, which affects 32-bit Thumb-2 branch instructions that span two 4K regions, where the target address is in the first 4K region. The workaround is activated if either:
- The armlink command-line option --branchpatch=cortex-a8_q109 is used, or
- The armlink command-line option --cpu=cortex-a8 is used and a full link is being performed
This only needs to be used for Thumb-2 code intended to be run on Cortex-A8 revision r3p0 or earlier parts. Please contact your silicon vendor for more information on this erratum. When activated the linker will scan for instruction sequences that may trigger the erratum behaviour. If such a sequence is found the linker will insert a patch to prevent the erratum behaviour. Use the "--info patches" switch to be informed of the Object, Section and the Offset within the Section where the patch has been applied. The trigger conditions that the linker looks for are:
- A 4-byte direct Thumb-2 branch instruction spans a region boundary, i.e. (address & 0xffe) == 0xffe
- The branch instruction is backwards and has a range of less than 4KB
- The instruction preceding the branch is a 4-byte non-branch instruction.
The linker patch converts the backwards branch to a forwards branch to a patch at the end of the Section. The patch consists of a backwards unconditional branch to the original target. The patch is aligned such that the backwards branch can never span a region boundary. The restrictions are:
- When partial linking the linker does not always have the address information to know that an address will never be placed on a region boundary. This will mean that the linker may patch more instructions in a Section than if the patch were applied in a full link
- A branch that requires patching must be able to reach the patch at the end of the Section. If the linker is unable to place the patch within range of the branch it will give a warning message. The range of a Thumb-2 unconditional branch is 16MB and the range of a conditional branch is 512KB so this is unlikely to happen in practice
- The linker will increase the alignment of any Program Segment containing a patch to 4KB.
- The linker now assigns unassigned sections to .ANY execution regions as documented, i.e. the largest section is first assigned to the execution region with the most available space, and so on
- The linker callgraph now correctly detects tail-calls that have been transformed into a NOP by the linker. Previously these calls could be missed which would cause the tail-called function to be marked as unused
- R_ARM_COPY relocations are no longer generated for SysV applications built using fpic
Assembler:
- Cases where use of the EXTERN directive could result in a corrupt object file have been fixed
NOTE: RealView Development Suite (RVDS) and ARM Developer Suite (ADS) downloads are now delivered via Connect, ARM's IP delivery system. You will need to enter your username and password to login.
Visit the ARM website for to login or to create an account.
Contact Logic Technology for more information or visit: Logic Solutions for ARM.
|